| PART |
Description |
Maker |
| XC3195A XC3100A XC3120A XC3130A XC3142A XC3164A XC |
Ultra-high-speed FPGA family with six members
Logic Cell Array Families
|
XILINX[Xilinx, Inc]
|
| XC2018 |
(XC2018 / XC2064) Logic Cell Array
|
Xilinx
|
| HER301 HER303 HER302 |
28000 GATE 3.3 VOLT LOGIC CELL ARRAY - NOT RECOMMENDED for NEW DESIGN
3.0 AMP HIGH EFFICIENCY RECTIFIERS 3.0放大器高效整流二极管
|
Bytes
|
| 256 600 120 ATL25_432 ATL25 ATL25_976 ATL25_100 AT |
ASIC 专用集成电路
From old datasheet system
The ATL25 series gate array and embedded array families from Atmel are fabricated on a 0.25 micron CMOS process with 5 levels of metal. This family features arrays with up to 6.9 million routable gates and 976 pins. The high density and hi
|
Atmel, Corp.
Atmel Corp.
ATMEL[ATMEL Corporation]
|
| EPM7032AETI44-7 EPM7064AETI44-7 EPM7128AETI144-7 E |
Programmable logic , 32 macrocells, 2 logic array blocks, 36 I/O pins, 7ns
Programmable logic , 64 macrocells, 4 logic array blocks, 36 I/O pins, 7ns
Programmable logic , 128 macrocells, 8 logic array blocks, 100 I/O pins, 7ns
Programmable logic , 64 macrocells, 4 logic array blocks, 41 I/O pins, 10ns
Programmable logic , 64 macrocells, 4 logic array blocks, 41 I/O pins, 4ns
Programmable logic , 64 macrocells, 4 logic array blocks, 41 I/O pins, 7ns
Programmable logic , 32 macrocells, 2 logic array blocks, 36 I/O pins, 10ns
Programmable logic , 32 macrocells, 2 logic array blocks, 36 I/O pins, 4ns
Programmable logic , 64 macrocells, 4 logic array blocks, 36 I/O pins, 10ns
Programmable logic , 64 macrocells, 4 logic array blocks, 36 I/O pins, 4ns
Programmable logic , 128 macrocells, 8 logic array blocks, 68 I/O pins, 10ns
Programmable logic , 128 macrocells, 8 logic array blocks, 68 I/O pins, 5ns
Programmable logic , 128 macrocells, 8 logic array blocks, 68 I/O pins, 7ns
Programmable logic , 256 macrocells, 16 logic array blocks, 120 I/O pins, 7ns
|
Altera Corporation
|
| XC2S100-5FG256C XC2S100-5FG256I XC2S100 XC2S15-5VQ |
Spartan-II FPGA Family Data Sheet
30000 SYSTEM GATE 2.5 VOLT LOGIC CELL AR - NOT RECOMMENDED for NEW DESIGN FPGA, 216 CLBS, 30000 GATES, 263 MHz, PQFP144
100000 SYSTEM GATE 2.5 VOLT LOGIC CELL A - NOT RECOMMENDED for NEW DESIGN FPGA, 600 CLBS, 100000 GATES, 263 MHz, PBGA256
150000 SYSTEM GATE 2.5 VOLT LOGIC CELL A - NOT RECOMMENDED for NEW DESIGN FPGA, 864 CLBS, 150000 GATES, 263 MHz, PBGA456
200000 SYSTEM GATE 2.5 VOLT LOGIC CELL A - NOT RECOMMENDED for NEW DESIGN FPGA, 1176 CLBS, 200000 GATES, 263 MHz, PBGA256
200000 SYSTEM GATE 2.5 VOLT LOGIC CELL A - NOT RECOMMENDED for NEW DESIGN FPGA, 1176 CLBS, 200000 GATES, 263 MHz, PBGA456
100000 SYSTEM GATE 2.5 VOLT LOGIC CELL A - NOT RECOMMENDED for NEW DESIGN FPGA, 600 CLBS, 100000 GATES, 263 MHz, PQFP144
30000 SYSTEM GATE 2.5 VOLT LOGIC CELL AR - NOT RECOMMENDED for NEW DESIGN FPGA, 216 CLBS, 30000 GATES, 263 MHz, PQFP100
150 000 SYSTEM GATE 2.5 VOLT FPGA (IQ AU - NOT RECOMMENDED for NEW DESIGN
15000 SYSTEM GATE 2.5 VOLT LOGIC CELL AR - NOT RECOMMENDED for NEW DESIGN
50000 SYSTEM GATE 2.5 VOLT LOGIC CELL AR - NOT RECOMMENDED for NEW DESIGN
Spartan-II FPGA Family
Second generation ASIC replacement technology
|
Xilinx, Inc.
XILINX INC
|
| MAX7000 MAX7000S EPM7128E EPM7128S EPM7256E EPM725 |
Programmable logic , 128 macrocells, 8 logic array blocks, 68 I/O pins, 10ns
MAX 7000 Programmable Logic Device Family
|
ATERA
Altera Corporation
|
| PA7536SI-15 PA7536 PA7536J-15 PA7536JI-15 PA7536P- |
PEEL Array-TM Programmable Electrically Erasable Logic Array
|
ANACHIP[Anachip Corp]
|
| PALCE16V8H-5SC PALCE16V8H-5SI PALCE16V8H-5SI4 PALC |
CAP 47PF 100V 5% NP0(C0G) SMD-1206 TR-7-PL SN-NIBAR
CAP 47PF 200V 5% NP0(C0G) SMD-1206 TR-7-PL SN-NIBAR
EE CMOS Zero-Power 20-Pin Universal Programmable Array Logic
EE CMOS 20-Pin Universal Programmable Array Logic 电子工程的CMOS 20引脚通用可编程阵列逻辑
EE CMOS 20-Pin Universal Programmable Array Logic EE PLD, 20 ns, PDIP20
EE CMOS 20-Pin Universal Programmable Array Logic EE PLD, 25 ns, PQCC20
EE CMOS 20-Pin Universal Programmable Array Logic EE PLD, 25 ns, PDIP20
EE CMOS 20-Pin Universal Programmable Array Logic EE PLD, 15 ns, PQCC20
EE CMOS 20-Pin Universal Programmable Array Logic EE PLD, 15 ns, PDIP20
EE CMOS 20-Pin Universal Programmable Array Logic EE PLD, 20 ns, PQCC20
CAP 47PF 50V 5% NP0(C0G) SMD-1206 TR-7-PL SN-NIBAR 电子工程的CMOS 20引脚通用可编程阵列逻辑
CAP 47PF 100V 5% NP0(C0G) SMD-1206 SN-NIBAR SPECIAL PKG 电子工程的CMOS 20引脚通用可编程阵列逻辑
8 BIT MCU W/8K FLASH
|
Advanced Micro Devices, Inc.
Lattice Semiconductor, Corp.
ADVANCED MICRO DEVICES INC
|
| PAL20L4-7DC PAL20L4-7JC PAL20L4-7PC PAL20L6-7DC PA |
24-pin TTL Programmable Array Logic 24针的TTL可编程阵列逻辑
24-pin TTL Programmable Array Logic OT PLD, 25 ns, PDIP24
24-pin TTL Programmable Array Logic OT PLD, 20 ns, PDIP24
24-pin TTL Programmable Array Logic OT PLD, 35 ns, PDIP24
24-pin TTL Programmable Array Logic OT PLD, 25 ns, CDIP24
24-pin TTL Programmable Array Logic OT PLD, 20 ns, CDIP24
24-pin TTL Programmable Array Logic OT PLD, 20 ns, PQCC28
24-pin TTL Programmable Array Logic OT PLD, 10 ns, CDIP24
24-pin TTL Programmable Array Logic OT PLD, 18 ns, PDIP24
24-pin TTL Programmable Array Logic OT PLD, 15 ns, CDIP24
24-pin TTL Programmable Array Logic OT PLD, 35 ns, PQCC28
|
Advanced Micro Devices, Inc.
|
| ATC18 |
ER 4C 4#4 SKT RECP
Embedded ASIC Memory Cell
The ATC18 Cell-based ASIC (CBIC) family features a comprehensive library of 0.18-micron standard logic and I/O cells designed to operate with a supply voltage of 1.8V /- 0.15V and memory cells compiled to the precise requirements of the d
|
Atmel Corp.
ATMEL Corporation
|
| S1X70000 |
STANDARD CELL / EMBEDDED ARRAY
|
Epson Company
|
|
